Ferritaas Incident Intelligence
Defect Intelligence Report Bug 0908124 Severity: High (P2)

FortiGate 90G 10GE SFP+ Link Down & Flapping on Passive DAC Cables

SFP+ ports 1 and 2 on FortiGate 90G and 91G desktop firewalls experience continuous link flapping, false carrier-loss interrupts, and transmission blackholes when interconnected to top-of-rack switches using short passive Direct Attach Copper (DAC) twinax cables.

๐Ÿš€ Open Full Runbook & Live Automation on Ferrite โ†’ Browse Known Issues Directory
โฑ๏ธ Est. Triage: 5โ€“7 mins | Automated CLI Available

Technical Root Cause Analysis

The FortiGate 90G hardware platform incorporates dual 10GE SFP+ interfaces driven by an integrated Broadcom physical transceiver subsystem (PHY). Under default driver operation, the kernel module periodically scans physical links via bcm_phy_serdes_link_scan().

When connected via passive Direct Attach Copper (DAC) cablesโ€”typically 1 to 3 meters in lengthโ€”the receiver channel encounters virtually zero optical attenuation and minimal high-frequency channel insertion loss. The driver's Continuous Decision Feedback Equalization (DFE) engine interprets this low-loss profile as an adaptation anomaly and drives equalization taps to their extreme boundaries. This induces Clock and Data Recovery (CDR) phase drift, leading to instantaneous CDR loss of lock (cdr_lock=0) and dropping the interface link state before restarting adaptation.

[bcm_phy] bcm_phy_serdes_link_scan: port sfp+1 SerDes CDR loss of lock (rx_los=0, cdr_lock=0) [bcm_phy] DFE adaptation timeout on lane 0, tap1=0x1f tap2=-0x0a tap3=0x04 kernel: port sfp+1: link down (carrier lost) kernel: port sfp+1: link up (10000 Mbps Full Duplex) [bcm_phy] bcm_phy_serdes_link_scan: link flapping detected on port sfp+1 (18 transitions in 60s) [bcm_phy] auto-negotiation forced restart; resetting SerDes DFE equalizer

Affected Firmware & Blast Radius Matrix

FortiOS Branch Vulnerable Builds Confirmed Clean Build Status & Workaround
FortiOS 7.2 7.2.5 โ€“ 7.2.8 7.2.9+ Lock port speed to 10000full, disable autonego
FortiOS 7.4 7.4.1 โ€“ 7.4.3 7.4.4+ Upgrade recommended; or deploy AOC cables
FortiOS 7.0 Not Applicable 7.0 Branch Clean FG-90G hardware not supported on 7.0

Platform Impact: Confined to FortiGate 90G and 91G hardware revisions with SFP+ interfaces 1 and 2 connected to switches or routers via passive copper DAC cables (1m, 2m, 3m). Active Optical Cables (AOC) and optical transceivers are unaffected.

Step 01: Free Verification CLI (Safe Read-Only)

Execute these diagnostic commands on the FortiGate 90G console to inspect PHY diagnostic counters and verify whether SerDes CDR lock failures are occurring:

Diagnostic Commands

# 1. Query physical NIC status and transceiver EEPROM optical telemetry
diagnose hardware deviceinfo nic sfp+1

# 2. Inspect low-level Broadcom SerDes PHY register diagnostic flags
fnsysctl cat /proc/net/bcm/sfp_diag

# 3. Check kernel netlink interface link carrier transition counts
diagnose netlink interface list | grep -A 8 "sfp+1"

# 4. Review recent link flap entries in the system event log
execute log filter category 1
execute log filter field subtype system
execute log display | grep -E "sfp\+1|link down"

Remediation & Workaround Steps (Teaser Preview)

Follow the complete step-by-step remediation guide in the Ferrite interactive platform:

Step 02: Lock Physical Interface Speed and Disable Auto-Negotiation

Override dynamic IEEE link training by enforcing static 10000full speed and disabling autonego on both FortiGate and upstream switch ports.

๐Ÿ”’ Interactive CLI Available in Ferrite Runbook #21

Step 03: Apply Static Broadcom SerDes Equalizer Presets

Disable continuous DFE adaptation and enforce fixed tap-weight equalization optimized for short copper twinax loops.

๐Ÿ”’ Interactive CLI Available in Ferrite Runbook #21

Step 04: Migrate to Active Optical Cables (AOC) or Optical Transceivers

Deploy standard SFP+ optical transceivers (10G-SR/LR) or active optical cables to permanently avoid copper attenuation calibration traps.

๐Ÿ”’ Interactive CLI Available in Ferrite Runbook #21
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Frequently Asked Questions

What causes SFP+ link flapping on FortiGate 90G with passive DAC cables?

The Broadcom physical layer (PHY) driver initializes SerDes channels in continuous decision feedback equalization (DFE) adaptive mode. On passive DAC cables shorter than 3 meters, minimal high-frequency insertion loss confuses the adaptation algorithm, causing Clock and Data Recovery (CDR) loss of lock and rapid link-down events in bcm_phy_serdes_link_scan.

Can this be resolved without replacing physical cabling?

Yes. Manually configuring port speed to 10000full, disabling auto-negotiation, and upgrading to FortiOS 7.2.9+ or 7.4.4+ sets fixed initial equalization tap weights, permanently stabilizing passive DAC connections without requiring hardware swaps.

Are active optical cables (AOC) or optical transceivers affected?

No. Optical transceivers (SR/LR) and active optical cables (AOC) utilize optical limiters that present clean digital waveforms to the SerDes, bypassing the DFE copper equalization issue entirely.