Ferritaas Incident Intelligence
Defect Intelligence Report Bug 0912304 Severity: Medium (P3)

FortiGate 120G Dual PSU False Amber Alarm on Cold Boot

FortiGate 120G and 121G next-generation firewalls equipped with dual redundant AC power supplies report a false amber LED failure and high-priority SNMP alarms on PSU2 following a cold boot or power-cycle event due to I2C sensor initialization timeouts.

Technical Root Cause Analysis

The FortiGate 120G/121G hardware platform features dual hot-swappable AC power supply modules connected over a shared internal SMBus/I2C sensor bus. During system cold boot or sudden AC power restoration, the baseboard management micro-controller queries power supply telemetry registers (input voltage, temperature, fan RPM, output current).

In early FortiOS 7.4 releases supporting the 120G NPI release, the sensor polling thread initiates register interrogation 1200ms before PSU2 has completed its internal power rail stabilizing sequence. When the I2C read operation times out without an ACK response, the kernel latches PSU2 into a permanent "Fault / Input Lost" state. The chassis LED turns amber, SNMP trap fgTrapPowerSupplyFailure is fired, and syslog flags PSU2 as defective, despite the power supply delivering full, redundant 12V output.

[kernel] i2c_dw_read: i2c bus 3 addr 0x59 timeout waiting for bus ready [sensor] psu_check: read PSU2 register 0x02 failed (rc=-110) [sensor] alert: PSU2 (Power Supply 2) state changed to FAULT / NO_INPUT [snmpd] sending trap fgTrapPowerSupplyFailure: psu_index=2, status=failed Chassis Alarm: Power Supply 2 Failure detected. Amber LED activated.

Affected Firmware & Blast Radius Matrix

FortiOS Branch Vulnerable Builds Confirmed Clean Build Status & Workaround
FortiOS 7.4 (120G NPI) 7.4.2 NPI – 7.4.3 7.4.4 GA+ Re-poll sensor via CLI or upgrade to 7.4.4 GA
FortiOS 7.2 Not Applicable Not Supported on 120G 120G platform requires FortiOS 7.4 or later
FortiOS 7.0 Not Applicable Not Supported on 120G Hardware generation not present on 7.0

Platform Impact: Exclusively affects FortiGate 120G and FortiGate 121G models with dual redundant AC power supply units installed. Single-PSU units and other G-series models (e.g., 90G, 200G) utilize distinct sensor bus layouts.

Step 01: Free Verification CLI (Safe Read-Only)

Execute these diagnostic commands to verify whether PSU2 is electrically operational and distinguish false I2C timeout alarms from genuine power supply hardware defects:

Diagnostic Commands

# 1. Query real-time chassis power supply sensor outputs
execute sensor list | grep -i PSU

# 2. Inspect low-level hardware device info for PSU 1 and PSU 2
diagnose hardware deviceinfo psu

# 3. Check PSU electrical parameters and rail status
diagnose hardware sysinfo psu

# 4. Review hardware sensor alarm history
diagnose hardware sensor status

Remediation & Workaround Steps (Teaser Preview)

Follow the complete step-by-step remediation guide in the interactive Ferrite platform:

Step 02: Non-Disruptive I2C Sensor Bus Re-scan

Re-trigger I2C hardware bus communication to refresh PSU2 telemetry and extinguish the amber LED without downtime.

🔒 Interactive CLI Available in Ferrite Runbook #21

Step 03: Re-arm SNMP Power Alarm State

Clear latched NMS monitoring alert states and verify trap acknowledgment across enterprise SIEM platforms.

🔒 Interactive CLI Available in Ferrite Runbook #21

Step 04: Scheduled Firmware Upgrade to Debounced Release

Upgrade to FortiOS 7.4.4 GA+ which integrates the asynchronous 3000ms PSU debounce boot timer.

🔒 Interactive CLI Available in Ferrite Runbook #21
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Frequently Asked Questions

Why does FortiGate 120G display an amber PSU2 alarm on cold boot?

During cold system initialization, the Linux sensor daemon probes the internal I2C bus before the micro-controller on the secondary power supply (PSU2) has finished its internal power rail synchronization. When the I2C read times out, FortiOS flags PSU2 as missing or faulted, latching an amber front panel LED and sending false SNMP traps.

Is the appliance at risk of power loss or ungraceful shutdown?

No. The power supply is functioning normally at the electrical and hardware layer, providing continuous 12V power and proper load balancing. The issue is strictly an I2C communication race condition during boot sequence initialization.

How is this defect permanently fixed in firmware?

FortiOS 7.4.4 GA and higher introduce an asynchronous 3000ms debounce delay and multi-attempt retry loop on the I2C sensor bus during boot, preventing false alarms from latching before power rail stability.